Operating Voltage: 2.4V ~ 5.5V

Operating Temperature: -40 ~ 85℃

Package:

SC92F8372 (SOP20/TSSOP20)

Core: Ultra-speed 1T 8051

Flash ROM: 8 Kbytes Flash ROM (MOVC prohibited addressing 0000H~00FFH) can be rewritten 10,000 times

IAP: Code option into 0K, 0.5K, 1K or 8K

EEPROM: 128 bytes EEPROM can be rewritten 100,000 times. The data written-in has more than 10-year preservation life.

SRAM: Internal 256 bytes + external 128 bytes

System Clock (f_SYS):

l  Built-in 24 MHz high-speed RC oscillator (f_HRC):

n  as a system clock source, f_SYS can choose set by programmer for 12/6/2 MHz

n  Frequency Error: Suitable for 2.9V ~ 5.5V and -20 ~ 85℃ application environment, no more than ±1%

Built-in 128 kHz LRC Low-speed Oscillator:

l  Available to act as clock source of Base Timer (BTM), which can wake up STOP

l  Available to act as clock source of WDT

l  Frequency Error: 4.0V ~ 5.5V and -20 ~ 85℃ application environment, no more than ±4% of frequency error after register correction

Low-voltage Reset (LVR):

l  4-level LVR voltage options: 4.3V, 3.7V, 2.9V, 2.3V

l  The default is the Code Option value selected by the user

Flash Programming and Emulation:

l  2-wire JTAG programming and emulation interface

Interruption (INT):

l  Totally 9 interrupt sources, including Timer0, Timer1, Timer2, INT0, INT2, PWM, SSI, Base Timer, TK

l  Two external interrupt vectors shared by 7 external interrupt I/Os, which can be defined in rising-edge, falling-edge or double-edge trigger mode.

l  Two-level interrupt priority capability

Digital Peripheral:

l  Up to 18 two-way independently controllable I/O interfaces, able to configure pull-high resistor independently

l  P0, P2 4-level control drive capability

l  All IOs equipped with sink current drive capability (50mA)

l  11-bit WDT, optional clock division ratio

l  3 standard 80C51 timers: Timer0, Timer1 and Timer 2

l  4 channels common cycle, duty cycle adjustable PWM

l  1 UART/SPI/IIC communication interface (SSI)

Analog Peripheral:

l  16-channel dual mode touch circuit with low power consumption can be configured for high sensitivity or high reliability mode:

n  High sensitivity model to adapt to touch keys from a distance, close to the induction of sensitivity to demand higher touch application

n  High reliability model has very strong anti-interference, can pass the test of 10 v dynamic CS

n  Supporting 16-channels touch keys and derivative functions

n  Development software library support high flexibility and low development difficult

n  Automatic debugging software support, intelligent development

n  When scanning with a single TouchKey in stop mode, the overall power consumption of the chip can be as low as 11uA

Power Saving Mode:

l  IDLE Mode: can be woken up by any interrupt.

l  STOP Mode: can be woken up by INT0, INT2, Base Timer and TK.